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IDT74LVCH16652 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS, 5V TOLERANT I/O, BUS-HOLD
* Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range * VCC = 2.7V to 3.6V, Extended Range * CMOS power levels (0.4 W typ. static) * All inputs, outputs, and I/O are 5V tolerant * Supports hot insertion * Available in SSOP and TSSOP packages
IDT74LVCH16652
FEATURES:
DESCRIPTION:
DRIVE FEATURES: APPLICATIONS:
* High Output Drivers: 24mA * Reduced system switching noise * 5V and 3.3V mixed voltage systems * Data communication and telecommunication systems
This 16-bit transceiver and register is built using advanced dual metal CMOS technology. This high-speed, low power device is organized as twoindependent 8-bit bus transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed transmission of data between A bus and B bus either directly or from the internal storage registers. Each 8-bit transceiver/register features complementary Output Enable (OEAB and OEBA) inputs to control the transciever functions and Select lines (SAB and SBA) to select either real-time data or stored data. Separate clock inputsare provided for A and B port registers. Data on the A or B data bus, or both,can be stored in the internal registers by the low-to-high transitions at theappropriate clock pins. Flowthrough organization of signal pins simplifieslayout. All inputs are designed with hysteresis for improved noise margin. The LVCH16652A has been designed with a 24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The LVCH16652A has "bus-hold" which retains the inputs' last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
56 29
1OEBA
2OEBA
1OEAB 1CLKBA 1SBA 1CLKAB 1SAB
1
2OEAB 2CLKBA 2SBA 2CLKAB B REG 2SAB
28
55 54 2 3
30 31 27 26
B REG
D C
5 52 15
D C
42
1A1
A REG
1B1
2A1
A REG
2B1
D C
D C
TO 7 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
TO 7 OTHER CHANNELS
INDUSTRIAL TEMPERATURE RANGE
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(c) 2004 Integrated Device Technology, Inc.
JANUARY 2004
DSC-4689/3
IDT74LVCH16652 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1OEAB 1CLKAB 1SAB
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OEBA 1CLKBA 1SBA
Unit V C mA mA mA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
VTERM TSTG IOUT IIK IOK ICC ISS
Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VO < 0 Continuous Current through each VCC or GND
-0.5 to +6.5 -65 to +150 -50 to +50 -50 100
GND
1A1 1A2
GND
1B1 1B2
VCC
1A3 1A4 1A5
VCC
1B3 1B4 1B5
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
GND
1A6 1A7 1A8 2A1 2A2 2A3
GND
1B6 1B7 1B8 2B1 2B2 2B3
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT CI/O Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 4.5 6.5 6.5 Max. 6 8 8 Unit pF pF pF
GND
2A4 2A5 2A6
GND
2B4 2B5 2B6
VCC
2A7 2A8
VCC
2B7 2B8
NOTE: 1. As applicable to the device type.
GND
2SAB 2CLKAB 2OEAB
GND
2SBA 2CLKBA 2OEBA
PIN DESCRIPTION
Pin Names xAx Description Data Register A Inputs(1) Data Register B Outputs xBx xCLKAB, xCLKBA xSAB, xSBA xOEAB, xOEBA Data Register B Inputs(1) Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs
SSOP/ TSSOP TOP VIEW
NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
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IDT74LVCH16652 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
FUNCTION TABLE(1)
Inputs xOEAB L L X H L L L L H H H xOEBA H H H H X L L L H H L xCLKAB H or L H or L X X X H or L H or L xCLKBA H or L H or L X H or L X X H or L xSAB X X X X(3) X X X X L H H xSBA X X X X X X(3) L H X X H xAx Input Input Input Input Unspecified(3) Output Output Output Input Input Output Data I/O(2) xBx Input Input Unspecified(3) Output Input Input Input Input Output Output Output Isolation Store A and B Data Store A, hold B Store A in both registers Hold A, store B Store B in both registers Real time B data to A bus Stored B data to A bus Real time A data to B bus Stored A data to B bus Stored A data to B Bus and Stored B data to A bus
NOTES: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH Transition 2. The data output functions may be enabled or disabled by various signals at the xOEAB or xOEBA inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. 3. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers.
Operation or Function
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = -40C to +85C
Symbol VIH VIL IIH IIL IOZH IOZL IOFF VIK VH ICCL ICCH ICCZ ICC High Impedance Output Current (3-State Output pins) Input/Output Power Off Leakage Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 0V, VIN or VO 5.5V VCC = 2.3V, IIN = -18mA VCC = 3.3V VCC = 3.6V VIN = GND or VCC -- -- -- -- -- -- -- -0.7 100 -- -- -- 50 -1.2 -- 10 10 500 A V mV A VCC = 3.6V VO = 0 to 5.5V -- -- 10 A Parameter Input HIGH Voltage Level Input LOW Voltage Level Input Leakage Current VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V VI = 0 to 5.5V Test Conditions Min. 1.7 2 -- -- -- Typ.(1) -- -- -- -- -- Max. -- -- 0.7 0.8 5 A V Unit V
Quiescent Power Supply Current Variation
3.6 VIN 5.5V(2) One input at VCC - 0.6V, other inputs at VCC or GND
A
NOTES: 1. Typical values are at VCC = 3.3V, +25C ambient. 2. This applies in the disabled state only.
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IDT74LVCH16652 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
BUS MANAGEMENT FUNCTIONS
BUS A
BUS B
BUS A
BUS B
xOEAB xOEBA xCLKAB L L X
xCLKBA X
xSAB X
xSBA L
xOEAB H
xOEBA H
xCLKAB X
xCLKBA X
xSAB L
xSBA X
Real-Time Transfer Bus B to Bus A
Real-Time Transfer Bus A to Bus B
BUS A
BUS B
BUS A
BUS B
xOEAB xOEBA xCLKAB xCLKBA xSAB X X X H X L X X X L H
xSBA X X X
xOEAB xOEBA L H
xCLKAB H or L
xCLKBA H or L
xSAB H
xSBA X
Storage from A and/or B
Transfer Stored Data to A and/or B
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IDT74LVCH16652 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NOTES: 1. Pins with Bus-Hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25C ambient.
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current VCC = 3V VCC = 2.3V VCC = 3.6V
Test Conditions VI = 2V VI = 0.8V VI = 1.7V VI = 0.7V VI = 0 to 3.6V
Min. - 75 75 -- -- --
Typ.(2) -- -- -- -- --
Max. -- -- -- -- 500
Unit A A A
OUTPUT DRIVE CHARACTERISTICS
Symbol VOH Parameter Output HIGH Voltage VCC = 2.3V VCC = 2.3V VCC = 2.7V VCC = 3V VCC = 3V VOL Output LOW Voltage VCC = 2.3V to 3.6V VCC = 2.3V VCC = 2.7V VCC = 3V IOH = - 24mA IOL = 0.1mA IOL = 6mA IOL = 12mA IOL = 12mA IOL = 24mA Test Conditions(1) VCC = 2.3V to 3.6V IOH = - 0.1mA IOH = - 6mA IOH = - 12mA Min. VCC - 0.2 2 1.7 2.2 2.4 2 -- -- -- -- -- Max. -- -- -- -- -- -- 0.2 0.4 0.7 0.4 0.55 V Unit V
NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C.
OPERATING CHARACTERISTICS, VCC = 3.3V 0.3V, TA = 25C
Symbol CPD CPD Parameter Power Dissipation Capacitance per Transceiver Outputs enabled Power Dissipation Capacitance per Transceiver Outputs disabled Test Conditions CL = 0pF, f = 10Mhz Typical 55 12 Unit pF
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IDT74LVCH16652 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS(1)
VCC = 2.7V Symbol fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o) Propagation Delay xAx to xBx or xBx to xAx Propagation Delay xCLKAB or xCLKBA to xAx or xBx Propagation Delay xSBA or xSAB to xAx or xBx Output Enable Time xOEBA or xOEAB to xAx or xBx Output Disable Time xOEBA or xOEAB to xAx or xBx Set-up Time, xAx or xBx before xCLKAB or xCLKBA Hold Time, xAx or xBx after xCLKAB or xCLKBA Pulse Duration, CLKAB or CLKBA HIGH or LOW Output Skew(2) 3.3 -- -- -- 3.3 -- -- 500 ns ps 0 -- 0.2 -- ns 3.4 -- 3 -- ns -- 6.6 1.2 6.2 ns -- 6.6 1.6 6.3 ns -- 8.8 1.9 7.4 ns -- 7.3 2.4 6.4 ns Parameter Min. 150 -- Max. -- 6.4 VCC = 3.3V 0.3V Min. 150 1.4 Max. -- 6.3 Unit MHz ns
NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = - 40C to + 85C. 2 Skew between any two outputs of the same package and switching in the same direction.
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IDT74LVCH16652 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
VIH VT 0V VOH VT VOL VIH VT 0V
LVC Link
TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS
Symbol VLOAD VIH VT VLZ VHZ CL VCC(1)= 3.3V0.3V VCC(1)= 2.7V 6 2.7 1.5 300 300 50
VCC 500 Pulse (1, 2) Generator VIN D.U.T. RT 500 CL
LVC Link
SAME PHASE INPUT TRANSITION
VCC(2)= 2.5V0.2V 2 x Vcc Vcc Vcc / 2 150 150 30
Unit V V V mV mV pF
VLOAD Open GND
tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION
tPHL
6 2.7 1.5 300 300 50
tPHL
Propagation Delay
ENABLE CONTROL INPUT tPZL OUTPUT SWITCH NORMALLY CLOSED LOW tPZH OUTPUT SWITCH NORMALLY OPEN HIGH VLOAD/2 VT tPHZ VT 0V tPLZ DISABLE VIH VT 0V VLOAD/2 VLZ VOL VOH VHZ 0V
LVC Link
VOUT
Test Circuit for All Outputs
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 10MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 10MHz; tF 2ns; tR 2ns.
NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
Enable and Disable Times
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL SYNCHRONOUS CONTROL
SWITCH POSITION
Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch VLOAD GND Open
VIH VT 0V VOH VT VOL VOH VT VOL tPLH2 tPHL2
LVC Link
tSU
tH
tREM
tSU
tH
VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V
LVC Link
Set-up, Hold, and Release Times
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE VT
LVC Link
INPUT
tPLH1
tPHL1
VT
OUTPUT 1
tSK (x)
tSK (x)
OUTPUT 2
Pulse Width
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
Output Skew - tSK(X)
NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
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IDT74LVCH16652 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT LVC X XX Bus-Hold Temp. Range XXX Family XX XXX Device Type Package
PV PA 652 16 H 74
Shrink Small Outline Package Thin Shrink Small Outline Package 16-Bit Bus Transceiver and Register with 3-State Outputs Double-Density with Resistors, 24mA Bus-Hold -40C to +85C
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for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com
for Tech Support: logichelp@idt.com (408) 654-6459
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